PhD Thesis in Image/Video Processing Through FPGA Implementation

Posted by Silicon Mentor
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Research at PhD level in digital VLSI, DSP, DIP, digital communication, embedded systems, artificial intelligence and related field requires implementation of complex, high speed digital processing. The most appropriate tool for prototyping and development of such applications is FPGA (Field Programmable Gate Array).


FPGAs are being widely used for implementation of digital logic, DSP to develop applications in fields like:


·         Communication (5G, WSN, NOC)

·         Video/ Image processing (SVMs, filters and algorithms)

·         Searching sorting (in parallel with servers)

·         Artificial intelligence (learning algorithms)

·         Biomedical systems (prototyping ECG, EEG, BAN algorithms/systems)

·         Automotive (autonomous vehicles)

 

If the scope of thesis includes implementation of the project idea in FPGA like above stated examples, the approach of the work changes. Work carried out in such Ph.D includes implementation of completer idea which may include sub block and algorithms. The following essential steps are required in such work:


·         Development of algorithm/ behavioral model

·         Behavioral simulation and testing

·         Development of architecture ( for FPGA )

·         Optimization of algorithm for hardware

·         Conversion of algorithm or behavior in HDL or other language (C, systemC etc)

·         Implementation of architecture on FPGA and testing.

 

If we enter into details these steps are further divided into different parts.(i.e floating to fixed point arithmetic conversion, HDL coding and verification, FPGA interfacing, resource optimization etc.)  Performing all this requires expertise and involvement. These tasks can be dedicated to some other team with expertise or can be learned under guidance on FPGA implementation.

 

FPGA based development environment is a very powerful and flexible tool for prototyping and testing of high speed and processing power demanding applications/ algorithms. It helps in reducing difficulty and required time to develop and test complex applications which would have been tougher without these programmable devices with dedicated blocks and soft IP cores.